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Embedding Formal Worst-Case Latency Proofs and Memory-Safety Certificates into the snn-mlir MLIR Lowering Pipeline for IEC 62304-Compliant Edge Deployment of Spiking Neural Networks

2026-07-07

Abstract excerpt

<title>Abstract</title> <p>Neuromorphic spiking neural networks (SNNs) offer energy-efficient temporal computation suited to edge medical devices, but deployment in safety-critical settings is blocked by a toolchain gap: existing SNN compilers, including snn-mlir, generate valid C11 code but emit no machine-checkable evidence that compiled inference functions satisfy worst-case execution time (WCET) bounds or the...

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Literature Corpus work: 51f7f9bd-33cc-5a24-8a11-3b5891bb7dc2
DOI: 10.21203/rs.3.rs-10249388/v1

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Embedding Formal Worst-Case Latency Proofs and Memory-Safety Certificates into the snn-mlir MLIR Lowering Pipeline for IEC 62304-Compliant Edge Deployment of Spiking Neural NetworksDOI 10.21203/rs.3.rs-10249388/v1Read

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